Reusing Scan Chains for Test Pattern Decompression
نویسندگان
چکیده
The paper presents a method for testing a system-on-achip by using a compressed representation of the patterns on an external tester. The patterns for a certain core under test are decompressed by reusing scan chains of cores idle during that time. The method only requires a few additional gates in the wrapper, while the mission logic is untouched. Storage and bandwidth requirements for the ATE are reduced significantly.
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ورودعنوان ژورنال:
- J. Electronic Testing
دوره 18 شماره
صفحات -
تاریخ انتشار 2002